We’re looking for a Physical Design Applications Engineer to join the team and support the Tier-1 customer.
Besides to support our customer, you could learn and grow with our customer together through each interaction with them.
Develop your leadership and enlarge your social network are the return that you could get here as an AE role.
Synopsys now has Fusion Compiler that you could also expand your technical skills from P&R to Synthesis and Signoff.
Does this sound like a good role for you?
Physical Design Application Engineer (AE) is expected to support the sale and adoption of Synopsys P&R products to help customers successful with our tools. Responsibilities include providing pre-sales activity likes technical presentations, technical support, product application, product deployment, expert training and competitive benchmark. You are able to be the product expert to drive the success of Synopsys physical design flow and tools focusing on IC Compiler I/II and Fusion Compiler.
Besides that, you will have the chance to work and touch each kind of design by supporting different customers. During the communication with customer, you can stronger not only your technical knowledges but also soft skill knowledges to grow your future career for better diversity.
Key Qualifications
MSEE, or equivalent required with 2+ years of experience, or BSEE or equivalent with 7+ years of experience
Experiences should include ASIC/SoC back-end design (Place & Route), knowledge of designing in 28nm or below process technologies is preferred
Experience in timing sign-off and physical verification is desired. Good verbal and written presentation/communication skills are mandatory
Customer sensitivity, the ability to multiplex many issues & set priorities and have a helpful/caring attitude towards customers, and the desire to help customers exploit new technologies are essential for success in the position
Self-motivated & independently work alone with strong communication skill, good command of English and people skill are plus
Solid knowledge of Synopsys P&R tools, or competitive EDA tools. Advanced nodes or Synthesis experience is a plus
